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- arm locks -NOTE: there seems to be a problem with gcc skipping them when using optimizations (e.g.: it skips SWP).

Andrei Pelinescu-Onciul authored on 08/03/2002 08:19:36
Showing 1 changed files
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@@ -56,8 +56,10 @@ inline static int tsl(fl_lock_t* lock)
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 #elif defined __armv4l
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 	asm volatile(
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-			"swp [%1], %0 \n\t"
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-			"=r" (val), "=m" (*lock): "0" (val) : "memory"
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+			"# here \n\t"
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+			"swpb %0, %1, [%2] \n\t"
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+			: "=r" (val)
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+			: "r"(1), "r" (lock) : "memory"
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 	);
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 #else
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@@ -108,7 +110,10 @@ inline static void release_lock(fl_lock_t* lock)
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 	);
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 #elif defined __armv4l
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 	asm volatile(
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-		"mov $0, [%0]" : /*no output*/: "r"(lock): "memory"
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+		" str %0, [%1] \n\r" 
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+		: /*no outputs*/ 
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+		: "r"(0), "r"(lock)
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+		: "memory"
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 	);
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 #else
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 #error "unknown arhitecture"