May 11, 2007
View ccab6f017b

- atomic_add & atomic_cmpxchg added to ppc - atomic_unkown (used when the procesor does not suport atomic ops or is not among the supported ones), tries now to use a "hash" of locks if GEN_LOCK_SET_T_UNLIMITED is defined => less contention on multi-cpus - atomic_ops.h defines *_UNLIMITED macros when the number of locks or set size are limited only by the available memory (everything exept SYSV sems) - license changes: all the atomic* stuff and the locks are now under a BSD (OpenBSD) style license

Andrei Pelinescu-Onciul authored on 11/05/2007 20:44:15
November 22, 2006
View 7497d6bbff

- fastlock arm fix: arm early clobber added: according to the swp instruction specification the address register must be != from the other 2 . Fix from openser, originally sent by Julien Blache <jblache@debian.org>)

Andrei Pelinescu-Onciul authored on 22/11/2006 18:46:04
April 5, 2006
View ec49540783

- ppc fixes (s/stw/stwx/, s/lwz/lwzx) - missing early clobbers added for x86, sparc*, armv6, ppc*, alpha

Andrei Pelinescu-Onciul authored on 05/04/2006 08:49:57
April 4, 2006
View d3da846711

- fastlock: optimizations (in general a "nicer" spin on the lock for the other cpus) and cleanups for sparc, sparc64, armv6 (nosmp for now), ppc*, mips* - fastlock: alpha: replace the cond. jump backward with a cond. jump forward and then jump backward (because a cond. jump with a negative relative offset is always predicted as taken and we want it to be predicted as not taken) - fastlock: sparc (32) smp support - lock_ops.h: introduced lock_try and lock_set_try (non-blocking lock_*_get versions, returns -1 if it failed to get the lock and 0 if it succeeds), for all the supported locking methods (fast_lock, pthread_mutex, posix_sem, sysv_sems) - updated locking doc.

Andrei Pelinescu-Onciul authored on 04/04/2006 18:04:01
April 3, 2006
View a2fd48d964

- membar_write on x86_64 is by default empty (since on amd64 stores are always ordered)

Andrei Pelinescu-Onciul authored on 03/04/2006 19:03:16
View cc4d2e2c20

- lock optimizations: use the lock specific membar only if the lock_get operation succeeded (this means don't use it while spinning) => move the membar call in get_lock or try_lock

Andrei Pelinescu-Onciul authored on 03/04/2006 14:30:51
March 31, 2006
View 0db44da77f

- added atomic ops & mem. barriers support for: - arm - arm v6 (untested, but it compiles ok) - alpha (untested. but it compiles ok) - fastlock: minor fixes - Makefile.defs: support for mip64 and armv6; various minor fixes

Andrei Pelinescu-Onciul authored on 31/03/2006 21:22:40
March 15, 2006
View 3aa05ac028

- added mb_atomic_* ops, equivalent to membar(); atomic_*, but more optimized (e.g. on x86 most atomic ops act also as memory barriers so mb_atomic_* will be equiv. to atomic_* )

Andrei Pelinescu-Onciul authored on 15/03/2006 19:16:39
March 8, 2006
View 613e86abfd

- mips inline asm gcc 3.x warnings fixed - mips2 NOSMP mode (skip sync) - minor x86 & mips optimizations

Andrei Pelinescu-Onciul authored on 08/03/2006 16:50:19
May 25, 2005
View 871a6a07a2

- experimental ppc locking tweaks (not tested) - ppc64 enabled (the same ppc code should work)

Andrei Pelinescu-Onciul authored on 25/05/2005 10:53:44
December 16, 2004
View 245b8b9351

- various pre-release updates - use_domain set to 0 by default in all the modules - experimental sparc32 non-SMP support (thanks to Michael Grigoni)

Andrei Pelinescu-Onciul authored on 16/12/2004 17:39:46
September 28, 2004
View 4d080f498e

-x86_64 experimental support -various 64 bit warning fixes

Andrei Pelinescu-Onciul authored on 28/09/2004 18:10:08
September 12, 2004
View 5faaca7357

- minor cosmetic stuff

Andrei Pelinescu-Onciul authored on 12/09/2004 16:48:58
View 5ffcc5d0a9

- experimental mips2 and >=2 support (R4000, R5000, R6000)

Andrei Pelinescu-Onciul authored on 12/09/2004 16:32:30
August 24, 2004
View 53c7e0f19a

- Spelling checked - READMEs updated

Jan Janak authored on 24/08/2004 08:45:09