... | ... |
@@ -37,12 +37,12 @@ inline static int tsl(fl_lock_t* lock) |
37 | 37 |
asm volatile( |
38 | 38 |
" btsl $0, %1 \n\t" |
39 | 39 |
" adcl $0, %0 \n\t" |
40 |
- : "=q" (val), "=m" (*lock) : "0"(val) : "memory" /* "cc" */ |
|
40 |
+ : "=q" (val), "=m" (*lock) : "0"(val) : "memory", "cc" /* "cc" */ |
|
41 | 41 |
); |
42 | 42 |
#else |
43 | 43 |
val=1; |
44 | 44 |
asm volatile( |
45 |
- " xchg %b0, %1" : "=q" (val), "=m" (*lock) : "0" (val) : "memory" |
|
45 |
+ " xchg %b1, %0" : "=q" (val), "=m" (*lock) : "0" (val) : "memory" |
|
46 | 46 |
); |
47 | 47 |
#endif /*NOSMP*/ |
48 | 48 |
#elif defined __sparc |
... | ... |
@@ -53,6 +53,13 @@ inline static int tsl(fl_lock_t* lock) |
53 | 53 |
#endif |
54 | 54 |
: "=r"(val) : "r"(lock):"memory" |
55 | 55 |
); |
56 |
+ |
|
57 |
+#elif defined __armv4l |
|
58 |
+ asm volatile( |
|
59 |
+ "swp [%1], %0 \n\t" |
|
60 |
+ "=r" (val), "=m" (*lock): "0" (val) : "memory" |
|
61 |
+ ); |
|
62 |
+ |
|
56 | 63 |
#else |
57 | 64 |
#error "unknown arhitecture" |
58 | 65 |
#endif |
... | ... |
@@ -99,6 +106,10 @@ inline static void release_lock(fl_lock_t* lock) |
99 | 106 |
: "r" (lock) |
100 | 107 |
: "memory" |
101 | 108 |
); |
109 |
+#elif defined __armv4l |
|
110 |
+ asm volatile( |
|
111 |
+ "mov $0, [%0]" : /*no output*/: "r"(lock): "memory" |
|
112 |
+ ); |
|
102 | 113 |
#else |
103 | 114 |
#error "unknown arhitecture" |
104 | 115 |
#endif |